As is well known, the fabrication of integrated circuits has moved into sub-micron line width technology. In order to achieve such line widths for, for example, the metal interconnects of an integrated circuit, plasma etching is necessary. However, this creates problems where thin film resistors are fabricated as part of the integrated circuit, as will now be described.
Reference is made to FIGS. 1-9, which show method steps of forming a resistor as part of an integrated circuit, in accordance with the prior art. In FIG. 1, a semiconductor substrate 10 is provided, having an active region 12, which may of course be one of many active regions. A dielectric layer 14 is grown or chemical vapor deposited over the substrate 10, and a thin film resistor material 16 such as for example SiCr or NiCr is sputtered over the dielectric layer 14. A patterned photoresist layer 18 is provided over the layer of resistor material 16, as also shown in FIG. 1. The deposited film 16 is plasma etched, using for example a CF.sub.4 or SF.sub.6 plasma, or wet etched using for example an HF solution containing 9% HF and 91% H.sub.2 O by volume, and upon removal of the photoresist 18, a block of resistor material 16A is left on the dielectric layer 14, as shown in FIG. 2.
Another patterned photoresist layer 20 is provided, with an opening 22 therein allowing access to the dielectric 14 above the active region 12 (FIG. 3). Further etching is undertaken to provide an opening 24 in the dielectric 14 over the active region 12 (FIG. 4.) For smaller geometries, plasma etching in accordance with the above is undertaken, while for larger geometries, wet etching as set forth above can be undertaken. The photoresist 20 is then removed (FIG. 5) and a metal layer 26 (such as aluminum) is deposited over the resulting structure, in contact with the active region 12, as shown in FIG. 6.
Another patterned photoresist layer 28 is provided, as shown in FIG. 7, over the metal layer 26. Etching is then undertaken, to define the metal interconnects. At this point, metal is etched from above the resistor material 16A, so that the resistor material 16A is not in a short-circuit condition. A plasma etch, which could for example use Cl.sub.2 and BCl.sub.3 gases, although necessary to define sub-micron metal line widths, would not be possible at this step because the harsh plasma would destroy the exposed thin film resistor material 16A. Thus, by being limited to using a wet metal etch and with a solution of for example 80% H.sub.3 PO.sub.4, 5% HNO.sub.3, 5% CH.sub.3 COOH, and 10% H.sub.2 O by volume, at this step, submicron metal line widths cannot be achieved.
Use of such a wet etch results in the structure of FIG. 8, and then the structure of FIG. 9 after removal of the resist material 28.
In using a wet etch on the metal layer 26, one is limited to on the order of 7 to 10 micron metal lines, which is of course far removed from the submicron level.
In addition, the removal of photoresist with the resistor material 16A exposed causes a problem. With the photoresist being removed by a solvent, particles of the photoresist suspended in the solvent may stick to the resistor material 16A or wafer surface, causing defects therein and in future steps. In a prior art attempt to deal with this problem, a solvent clean is undertaken, and then an oxygen plasma is applied, which plasma removes photoresist particles that remain on the wafer. As described above, the problem with such a method is that the plasma is so harsh that the thin film resistor material 16A may be harmed.
In an attempt to solve this problem, the resistor material 16A has in the past been covered with a barrier metal 40 such as TiW prior to application of the metal layer (FIG. 10), and then a plasma etch using Cl.sub.2 and BCl.sub.3 is undertaken, down to the TiW. (A wet etch could be undertaken, but small geometries cannot be achieved).
The wafer is then put in a wet etch solution (for example a 40.degree. C. solution of 30% peroxide, 70% H.sub.2 O by volume or the wet etch solution specified above), to etch out the exposed TiW 40 (FIG. 11). However, such an approach has not proven successful because the plasma etch generally cannot be stopped on the TiW layer.